Publications

  • C. Mukherjee, B. Ardouin, J. Y. Dupuy, V. Nodjiadjim, M. Riet, T. Zimmer, F. Marc, and C. Maneux, « Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems, » IEEE Trans. Device Mater. Rel. vol. 17, no. 3, pp. 490-506, Sept. 2017, DOI: 10.1109/TDMR.2017.2710303.
  • P. Chevalier, M. Schröter,  C.R. Bolognesi, V. d’Alessandro, M. Alexandrova, J. Böck, R. Flückiger,  S. Fregonese, B. Heinemann, C. Jungemann, R. Lövblom, C. Maneux, O. Ostinelli, A. Pawlak, N. Rinaldi, H. Rücker, G. Wedel, T. Zimmer, « Si/SiGe:C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications, » Proc. IEEE, vol. 105, no. 6, pp. 1035-1050, June 2017, DOI: 10.1109/JPROC.2017.2669087
  • Wei Quan, Akshay M. Arabhavi, Ralf Flückiger, Olivier Ostinelli, and C.R. Bolognesi, « Quaternary Graded-Base InP/GaInAsSb DHBTs with fT/fMAX = 547/784 GHz », IEEE Electron Dev. Lett., Vol. 39, N° 8, August 2018, pp.1141 – 1144, DOI 10.1109/LED.2018.2849351.
  • C. Mukherjee, C. Raya, B. Ardouin, M. Deng, S. Frégonèse, T. Zimmer, V. Nodjiadjim, M. Riet, J.-Y. Dupuy, M. Luisier, W. Quan, A. Arabhavi, C. R. Bolognesi, and C.l Maneux, « Scalable Compact Modeling of III-V DHBTs: Prospective Figures of Merit towards THz Operation », IEEE Trans. On Electron Device, Oct. 2018, Vol. 65 , n°. 12 , Dec. 2018, pp. 5357-5364,\u000BDOI: 10.1109/TED.2018.2876551
  • C.R. Bolognesi, A.M. Arabhavi, W. Quan, O. Ostinelli, X. Wen, M. Luisier, « Advances in InP Double Heterojunction Bipolar Transistors », Solid State Devices and Materials Conference (SSDM 2018), Sept. 9-13 2018, Tokyo, Japan. INVITED
  • Wei Quan, Akshay M. Arabhavi, Ralf Flückiger, Olivier Ostinelli, and C.R. Bolognesi, « Quaternary Graded-Base InP/GaInAsSb DHBTs with fT/fMAX = 547/784 GHz », IEEE Electron Dev. Lett., Vol. 39, N° 8, August 2018, pp.1141 – 1144, DOI 10.1109/LED.2018.2849351
  • W. Quan, A.M. Arabhavi, R. Flückiger, O. Ostinelli, and C.R. Bolognesi, « Iterative De-embedding and Extracted Maximum Oscillation Frequency fMAX in mm-Wave InP DHBTs: The Impact of Device Dimensions on Extraction Errors », Proc. of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium. ISBN: 978-1-5386-6501-5, Oct. 14-17, 2018, San Diego CA
  • A.M. Arabhavi, W. Quan, O. Ostinelli, and C.R. Bolognesi, « Scaling of InP/GaAsSb DHBTs: A Simultaneous fT/fMAX = 463/829 GHz in a 10µm Long Emitter », Proc. of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium. ISBN: 978-1-5386-6501-5, Oct. 14-17, 2018, San Diego CA
  • Colombo R. Bolognesi, Wei Quan, Akshay M. Arabhavi, Tamara Saranovac, Ralf Flückiger, Olivier Ostinelli, Xin Wen and Mathieu Luisier, « Advances in InP/Ga(In)AsSb double heterojunction bipolar transistors (DHBTs) », Japanese journal of applied physics, vol. 58: no. SB, pp. SB0802, London: Institute of Physics (IOP), 2019.
  • V. Nodjiadjim, M. Riet, C. Mismer, R. Hersent, F. Jorge, A. Konczykowska, J.-Y. Dupuy, « 0.7-μm InP DHBT technology with 400-GHz fT and fMAX and 4.5-V BVCEo for high speed and high frequency integrated circuits, » in IEEE Journal of the Electron Devices Society, vol. 7, pp. 748-752, 2019. DOI: 10.1109/JEDS.2019.29282
  • X. Wen , C. Mukherjee , C. Raya, B. Ardouin, M. Deng, S. Frégonèse , V. Nodjiadjim , M. Riet, W. Quan, A. Arabhavi, O. Ostinelli, C. Bolognesi , T. Zimmer, C. Maneux , and M. Luisier, « A Multiscale TCAD Approach for the Simulation of InP DHBTs and the Extraction of Their Transit Times », IEEE Transactions on Electron Devices, 66 (12), pp.5084-5090, 2019. DOI: 10.1109/TED.2019.2946514.
  • M. Deng, C. Mukherjee, C. Yadav, S. Fregonese, T Zimmer, M. de Matos, W. Quan, A. M. Arabhavi, C. Bolognesi, X. Wen, M. Luisier, C. Raya, B. Ardouin, C Maneux, « Design of On-Wafer TRL Calibration Kit for InP Technologies Characterization up to 500 GHz », IEEE Transactions on Electron Devices, Volume: 67, Issue: 12, pp. 5441 – 5447, Dec. 2020, DOI: 10.1109/TED.2020.3033834
  • X. Wen, A. Arabhavi, W. Quan, O. Ostinelli, C. Mukherjee, M. Deng, S. Fregonese, T. Zimmer, C. Maneux, C. R. Bolognesi, and M. Luisier, “Performance Prediction of InP/GaAsSb Double Heterojunction Bipolar Transistors for THz applications”, under review, J. Appl. Phys. (2021).
  • M. Deng, C. Mukherjee, N. Davy, V. Nodjiadjim, M. Riet, C. Mismer, J. Renaudier, M. De Matos, C. Maneux, “InP DHBT characterization up to 500 GHz and compact model validation towards THz circuit design”, 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), December 5-8, 2021, Monterey, USA.Submitted.
  • N. Davy, V. Nodjiadjim, M. Riet, C. Mismer, M. Deng, C. Mukherjee, J. Renaudier, C. Maneux, “0.4-µm InP/InGaAs DHBT with a 380-GHz fT> 600-GHz fMAX and BVCE0 > 4.5 V”, 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), December 5-8, 2021, Monterey, USA.Submitted.
  • V. Nodjiadjim, M. Riet, C. Mismer, N. Davy, O. Ostinelli, C.R Bolognesi, « InP DHBT technology at III-V Lab », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • M. Arabhavi, W. Quan, S. Hamzeloui, O. Ostinelli, and C.R. Bolognesi, « THz InP/GaAsSb DHBTs », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • X. Wen, A. Arabhavi, W. Quan, O. Ostinelli, C. Mukherjee, M. Deng, S. Frégonèse, T. Zimmer, C. Maneux, C.R. Bolognesi, and M. Luisier, « Multi-Scale Modeling of Type-II DHBTs: from Bandstructure to Self-Heating Effects », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • M. Deng, C. Mukherjee, C. Yadav, C. Bolognesi, V. Nodjiadjim, S. Fregonese, T. Zimmer, M. De Matos, C. Maneux,  » On-Wafer TRL Calibration Kit Design for InP Technologies Characterization Up To 500 GHz », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • C. Mukherjee, M. Deng, C. Maneux, C. Bolognesi, V. Nodjiadjim, “Compact Modeling and Parameter Extraction Strategies for InP Double Heterojunciton Bipolar Transistors », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • C. Mukherjee, M. Deng, C. Maneux, C. Bolognesi, V. Nodjiadjim, “Compact Modeling and Parameter Extraction Strategies for InP Double Heterojunciton Bipolar Transistors », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • B. Ardouin, C. Mukherjee, « A tool for parameter extraction of bipolar transistors », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.
  • A. Konczykowska, R. Hersent, F. Jorge, V. Nodjiadjim, M. Riet, C. Mismer, F. Blache, B. Duval, J. Renaudier, « Recent advances in high-speed and large-swing integrated circuits implemented in InGaAs and GaAsSb InP DHBT for Terabit-class optical communications », Workshop ESSxxRC, European Solid-state Circuits and Devices Conference Grenoble, Sept. 7-9, 2021.